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FASE
2004
Springer
15 years 12 months ago
Systematic Testing of Software Architectures in the C2 Style
The topic of software architecture (SA) based testing has recently raised some interest. Recent work on the topic has used the SA as a reference model for code conformance testing,...
Henry Muccini, Marcio S. Dias, Debra J. Richardson
DATE
2003
IEEE
132views Hardware» more  DATE 2003»
15 years 12 months ago
Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
Youngchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung C...
DATE
2010
IEEE
119views Hardware» more  DATE 2010»
15 years 11 months ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
FPL
2010
Springer
170views Hardware» more  FPL 2010»
15 years 4 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
ISCAS
2008
IEEE
126views Hardware» more  ISCAS 2008»
16 years 1 months ago
Off-time prediction in digital constant on-time modulation for DC-DC converters
—This paper proposes a digital constant on-time control method for high switching frequency DC-DC buck converter, which eliminates the need for high resolution digital pulse-widt...
Na Kong, Dong Sam Ha, Jian Li, Fred C. Lee