In this paper we present a solution for efficient porting of sequential C++ applications on the Cell B.E. processor. We present our step-by-step approach, focusing on its general...
Ana Lucia Varbanescu, Henk J. Sips, Kenneth A. Ros...
Abstract— This paper presents an optimized channel usage between simulator and accelerator when the simulator models transaction-level SoC while accelerator models RTL sub-blocks...
For many years, C has been known as a fast, yet unfriendly language. Similarly, Java presents its own trade-offs, including more advanced language features at the cost of slower ex...
Rapid evaluation and design space exploration at the algorithmic level are important issues in the design cycle. In this paper we propose an original area vs delay estimation meth...
Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe...
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...