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DSD
2008
IEEE
124views Hardware» more  DSD 2008»
16 years 1 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
HICSS
2003
IEEE
132views Biometrics» more  HICSS 2003»
15 years 11 months ago
Experience with ANSI C Markup Language for a Cross-Referencer
The purpose of this paper is twofold: (1) to examine the properties of our ANSI C Markup Language (ACML) as a domain-specific language (DSL); and (2) to show that ACML is useful ...
Hayato Kawashima, Katsuhiko Gondow
RECOMB
2008
Springer
16 years 6 months ago
Automatic Recognition of Cells (ARC) for 3D Images of C. elegans
The development of high-resolution microscopy makes possible the high-throughput screening of cellular information, such as gene expression at single cell resolution. One of the cr...
Fuhui Long, Hanchuan Peng, Xiao Liu, Stuart K. Kim...
SAMOS
2004
Springer
15 years 12 months ago
Modeling Instruction Semantics in ADL Processor Descriptions for C Compiler Retargeting
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
Jianjiang Ceng, Weihua Sheng, Manuel Hohenauer, Ra...
DATE
2004
IEEE
158views Hardware» more  DATE 2004»
15 years 10 months ago
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
Srinivasan Murali, Giovanni De Micheli