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ESCIENCE
2005
IEEE
16 years 2 days ago
High-Performance Task Distribution for Volunteer Computing
Volunteer computing projects use a task server to manage work. Clients periodically communicate with the server to report completed tasks and get new tasks. The rate at which the ...
David P. Anderson, Eric Korpela, Rom Walton
FCCM
2005
IEEE
111views VLSI» more  FCCM 2005»
16 years 2 days ago
A High-Performance Asynchronous FPGA: Test Results
We report test results from a prototype asynchronous FPGA (AFPGA) implemented in TSMC’s 0.18μm CMOS process. The AFPGA uses SRAM-based configuration bits with pipelined logic ...
David Fang, John Teifel, Rajit Manohar
ICMCS
2005
IEEE
104views Multimedia» more  ICMCS 2005»
16 years 1 days ago
A High-Performance Memory-Efficient Architecture of the Bit-Plane Coder in JPEG 2000
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
Grzegorz Pastuszak
ISVLSI
2005
IEEE
97views VLSI» more  ISVLSI 2005»
16 years 1 days ago
A High Performance Hybrid Wave-Pipelined Multiplier
The clock period in conventional pipeline scheme is proportional to the maximum delay while in hybrid wave-pipelining it is proportional to the maximum delay difference. An 8×8-b...
Suryanarayana Tatapudi, José G. Delgado-Fri...
SBACPAD
2005
IEEE
87views Hardware» more  SBACPAD 2005»
16 years 1 days ago
High Performance Computing in Science and Engineering
Peter W. Haas, Michael M. Resch