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ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
16 years 22 days ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
RTCSA
2007
IEEE
16 years 21 days ago
MB++: An Integrated Architecture for Pervasive Computing and High-Performance Computing
MB++ is a system that caters to the dynamic needs of applications in a distributed, pervasive computing environment that has a wide variety of devices that act as producers and co...
David J. Lillethun, David Hilley, Seth Horrigan, U...
APCCAS
2006
IEEE
224views Hardware» more  APCCAS 2006»
16 years 15 days ago
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-We...
ICPPW
2005
IEEE
16 years 16 hour ago
Performance Evaluation of High-Speed Interconnects Using Dense Communication Patterns
We study the performance of high-speed interconnects using a set of communication micro-benchmarks. The goal is to identify certain limiting factors and bottlenecks with these int...
Rod Fatoohi, Ken Kardys, Sumy Koshy, Soundarya Siv...
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
16 years 7 hour ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov