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COORDINATION
2009
Springer
16 years 7 months ago
High-Performance Transactional Event Processing
This paper presents a transactional framework for low-latency, high-performance, concurrent event processing in Java. At the heart of our framework lies Reflexes, a restricted prog...
Antonio Cunei, Rachid Guerraoui, Jesper Honig Spri...
ICCD
2005
IEEE
110views Hardware» more  ICCD 2005»
16 years 3 months ago
Implementing Caches in a 3D Technology for High Performance Processors
3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication invo...
Kiran Puttaswamy, Gabriel H. Loh
PERCOM
2009
ACM
16 years 1 months ago
A High-Performance Remote Computing Platform
— The pervasive computing environment and the wide network bandwidth provide users more opportunities to utilize remote computing resources. In this paper, we introduce a highper...
Huifeng Shen, Yan Lu, Feng Wu, Shipeng Li
LCN
1998
IEEE
15 years 10 months ago
High Performance Integrated Network Communications Architecture (INCA)
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
Klaus Schug, Anura P. Jayasumana, Prasanth Gopalak...
DSD
2004
IEEE
104views Hardware» more  DSD 2004»
15 years 10 months ago
A Static Low-Power, High-Performance 32-bit Carry Skip Adder
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
Kai Chirca, Michael J. Schulte, John Glossner, Hao...