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DAC
1999
ACM
16 years 7 months ago
CAD Directions for High Performance Asynchronous Circuits
This paper describes a novel methodology for high performance asynchronous design based on timed circuits and on CAD support for their synthesis using Relative Timing. This method...
Ken S. Stevens, Shai Rotem, Steven M. Burns, Jordi...
ICCD
2001
IEEE
120views Hardware» more  ICCD 2001»
16 years 3 months ago
Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures
Filter cache has been proposed as an energy saving architectural feature [9]. A filter cache is placed between the CPU and the instruction cache (I-cache) to provide the instruct...
Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau
EUROPAR
2009
Springer
16 years 27 days ago
High Performance Matrix Multiplication on Many Cores
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...
Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zha...
ICCV
2005
IEEE
15 years 12 months ago
Fusing Points and Lines for High Performance Tracking
This paper addresses the problem of real-time 3D modelbased tracking by combining point-based and edge-based tracking systems. We present a careful analysis of the properties of t...
Edward Rosten, Tom Drummond
PACS
2000
Springer
99views Hardware» more  PACS 2000»
15 years 10 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar