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2003
IEEE
86views Hardware» more  DATE 2003»
15 years 11 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
HPDC
2002
IEEE
15 years 11 months ago
Dynamic Monitoring of High-Performance Distributed Applications
Developers and users of high-performance distributed systems often observe performance problems such as unexpectedly low throughput or high latency. Determining the source of the ...
Dan Gunter, Brian Tierney, Keith R. Jackson, Jason...
SIGCOMM
1996
ACM
15 years 10 months ago
ASHs: Application-Specific Handlers for High-Performance Messaging
Application-specific safe message handlers (ASHs) are designed to provide applications with hardware-level network performance. ASHs are user-written code fragments that safely an...
Deborah A. Wallach, Dawson R. Engler, M. Frans Kaa...
HPDC
2008
IEEE
16 years 23 days ago
XenLoop: a transparent high performance inter-vm network loopback
Advances in virtualization technology have focused mainly on strengthening the isolation barrier between virtual machines (VMs) that are co-resident within a single physical machi...
Jian Wang, Kwame-Lante Wright, Kartik Gopalan
ANCS
2005
ACM
15 years 12 months ago
Segmented hash: an efficient hash table implementation for high performance networking subsystems
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
Sailesh Kumar, Patrick Crowley