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VLSID
2001
IEEE
144views VLSI» more  VLSID 2001»
16 years 7 months ago
Next Generation Network Processors
Networking hardware manufacturers face the dual demands of supporting ever increasing bandwidth requirements, while also delivering new features, such as the ability to implement ...
Deepak Kataria
MOBIHOC
2005
ACM
16 years 6 months ago
On the node-scheduling approach to topology control in ad hoc networks
: In this paper, we analyze the node scheduling approach of topology control in the context of reliable packet delivery. In node scheduling, only a minimum set of nodes needed for ...
Budhaditya Deb, Badri Nath
IPSN
2010
Springer
16 years 1 months ago
Lakon: a middle-ground approach to high-frequency data acquisition and in-network processing in sensor networks
The need for high-frequency signal acquisition and processing is becoming increasingly prevalent in sensor networks. Applications that require high-frequency data sampling are pre...
Prashanth G. Reddy, Nigamanth Sridhar
IPPS
2006
IEEE
16 years 19 days ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
INFOCOM
2005
IEEE
16 years 6 days ago
On the maximal throughput of networks with finite buffers and its application to buffered crossbars
— The advent of packet networks has motivated many researchers to study the performance of networks of queues in the last decade or two. However, most of the previous work assume...
Paolo Giaccone, Emilio Leonardi, Devavrat Shah