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ASYNC
2007
IEEE
154views Hardware» more  ASYNC 2007»
16 years 17 days ago
Design of a High-Speed Asynchronous Turbo Decoder
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
Pankaj Golani, Georgios D. Dimou, Mallika Prakash,...
FPL
2009
Springer
156views Hardware» more  FPL 2009»
15 years 10 months ago
A highly scalable Restricted Boltzmann Machine FPGA implementation
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
Sang Kyun Kim, Lawrence C. McAfee, Peter L. McMaho...
NSDI
2010
15 years 7 months ago
Prophecy: Using History for High-Throughput Fault Tolerance
Byzantine fault-tolerant (BFT) replication has enjoyed a series of performance improvements, but remains costly due to its replicated work. We eliminate this cost for read-mostly ...
Siddhartha Sen, Wyatt Lloyd, Michael J. Freedman
ISM
2005
IEEE
212views Multimedia» more  ISM 2005»
15 years 11 months ago
Neural Network Based Framework For Goal Event Detection In Soccer Videos
In this paper, a neural network based framework for semantic event detection in soccer videos is proposed. The framework provides a robust solution for soccer goal event detection...
Kasun Wickramaratna, Min Chen, Shu-Ching Chen, Mei...
NOCS
2010
IEEE
15 years 4 months ago
Design of a High-Throughput Distributed Shared-Buffer NoC Router
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin,...