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GLOBECOM
2008
IEEE
16 years 22 days ago
High-Rate Space-Time Coded Large MIMO Systems: Low-Complexity Detection and Performance
— Large MIMO systems with tens of antennas in each communication terminal using full-rate non-orthogonal spacetime block codes (STBC) from Cyclic Division Algebras (CDA) can achi...
Saif K. Mohammed, Ananthanarayanan Chockalingam, B...
CLUSTER
2006
IEEE
16 years 10 days ago
Designing High Performance and Scalable MPI Intra-node Communication Support for Clusters
As new processor and memory architectures advance, clusters start to be built from larger SMP systems, which makes MPI intra-node communication a critical issue in high performanc...
Lei Chai, Albert Hartono, Dhabaleswar K. Panda
TVLSI
2010
15 years 29 days ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
DAC
2001
ACM
16 years 7 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
TKDE
1998
139views more  TKDE 1998»
15 years 6 months ago
Distributed Optimistic Concurrency Control Methods for High-Performance Transaction Processing
—There is an ever-increasing demand for more complex transactions and higher throughputs in transaction processing systems leading to higher degrees of transaction concurrency an...
Alexander Thomasian