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FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 8 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
200
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ICCTA
2007
IEEE
15 years 7 months ago
Digital Signal Types Identification Using a Hierarchical SVM-Based Classifier and Efficient Features
Automatic digital signal type identification (ADSTI) is an important topic for both military and civilian communication applications. Most of proposed techniques (identifiers) can...
Ataollah Ebrahimzadeh, Seyed Alireza Seyedin
JPDC
2008
92views more  JPDC 2008»
15 years 6 months ago
Techniques for pipelined broadcast on ethernet switched clusters
By splitting a large broadcast message into segments and broadcasting the segments in a pipelined fashion, pipelined broadcast can achieve high performance in many systems. In thi...
Pitch Patarasuk, Xin Yuan, Ahmad Faraj
PVLDB
2010
119views more  PVLDB 2010»
15 years 5 months ago
An Architecture for Parallel Topic Models
This paper describes a high performance sampling architecture for inference of latent topic models on a cluster of workstations. Our system is faster than previous work by over an...
Alexander J. Smola, Shravan Narayanamurthy
WIOPT
2011
IEEE
14 years 10 months ago
Lower bounds on the success probability for ad hoc networks with local FDMA scheduling
—This paper studies the performance of ad hoc networks with local FDMA scheduling using stochastic point processes. In such networks, the Poisson assumption is not justified due...
Ralph Tanbourgi, Jens P. Elsner, Holger Jäkel...