2852 search results - page 459 / 571 » High Performance Architectures and Compilers |
143
click to vote
VLSID
2005
IEEE
16 years 6 months ago
2005
IEEE
Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
123
click to vote
VLSID
2003
IEEE
16 years 6 months ago
2003
IEEE
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...
187
click to vote
HPCA
2003
IEEE
16 years 6 months ago
2003
IEEE
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
163
click to vote
OSDI
2004
ACM
16 years 6 months ago
2004
ACM
Program-counter-based (PC-based) prediction techniques have been shown to be highly effective and are widely used in computer architecture design. In this paper, we explore the op...
151
click to vote
MOBISYS
2006
ACM
16 years 6 months ago
2006
ACM
Deployments of wireless LANs consisting of hundreds of 802.11 access points with a large number of users have been reported in enterprises as well as college campuses. However, du...