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SIGCOMM
2004
ACM
15 years 11 months ago
Work-conserving distributed schedulers for Terabit routers
−Buffered multistage interconnection networks offer one of the most scalable and cost-effective approaches to building high capacity routers. Unfortunately, the performance of su...
Prashanth Pappu, Jonathan S. Turner, Kenneth Wong
ASPLOS
2008
ACM
15 years 8 months ago
The design and implementation of microdrivers
Device drivers commonly execute in the kernel to achieve high performance and easy access to kernel services. However, this comes at the price of decreased reliability and increas...
Vinod Ganapathy, Matthew J. Renzelmann, Arini Bala...
ICCAD
2009
IEEE
171views Hardware» more  ICCAD 2009»
15 years 4 months ago
A hybrid local-global approach for multi-core thermal management
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
Ramkumar Jayaseelan, Tulika Mitra
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 3 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
16 years 16 days ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski