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» High Performance Architectures and Compilers
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WWW
2005
ACM
16 years 7 months ago
A multi-threaded PIPELINED Web server architecture for SMP/SoC machines
Design of high performance Web servers has become a recent research thrust to meet the increasing demand of networkbased services. In this paper, we propose a new Web server archi...
Gyu Sang Choi, Jin-Ha Kim, Deniz Ersoz, Chita R. D...
VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
16 years 7 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
LREC
2008
110views Education» more  LREC 2008»
15 years 8 months ago
Automatic Assessment of Japanese Text Readability Based on a Textbook Corpus
This paper describes a method of readability measurement of Japanese texts based on a newly compiled textbook corpus. The textbook corpus consists of 1,478 sample passages extract...
Satoshi Sato, Suguru Matsuyoshi, Yohsuke Kondoh
DATE
2008
IEEE
114views Hardware» more  DATE 2008»
16 years 1 months ago
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
Sanghyun Park, Aviral Shrivastava, Yunheung Paek
XIMEP
2006
ACM
194views Database» more  XIMEP 2006»
16 years 15 days ago
Template Folding for XPath
We discuss query evaluation for XML-based server systems where the same query is evaluated on every incoming XML message. In a typical scenario, many of the incoming messages will...
Carl-Christian Kanne, Guido Moerkotte