5977 search results - page 725 / 1196 » Hierarchical Performance Modeling for Distributed System Arc... |
218
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CGO
2010
IEEE
16 years 1 months ago
2010
IEEE
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
202
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NPL
2006
15 years 6 months ago
2006
In this paper we construct an associative memory model based on the restricted Coulomb energy (RCE) network. We propose a simple architecture and training algorithm for this RCE-b...
187
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ICANN
2003
Springer
16 years 5 days ago
2003
Springer
Abstract. Solutions to the symbol grounding problem, in psychologically plausible cognitive models, have been based on hybrid connectionist/symbolic architectures, on robotic appro...
208
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EWSPT
2001
Springer
15 years 11 months ago
2001
Springer
We describe an approach based upon software process technology to on-the-fly monitoring, redeployment, reconfiguration, and in general dynamic adaptation of distributed software ap...
218
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DAC
2010
ACM
15 years 5 months ago
2010
ACM
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...