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ISLPED
2004
ACM
137views Hardware» more  ISLPED 2004»
16 years 12 days ago
Location cache: a low-power L2 cache system
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
Rui Min, Wen-Ben Jone, Yiming Hu
CODES
2004
IEEE
15 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
GLVLSI
2007
IEEE
211views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
Salvatore Carta, Andrea Acquaviva, Pablo Garcia De...
ICML
2010
IEEE
15 years 7 months ago
FAB-MAP: Appearance-Based Place Recognition and Mapping using a Learned Visual Vocabulary Model
We present an overview of FAB-MAP, an algorithm for place recognition and mapping developed for infrastructure-free mobile robot navigation in large environments. The system allow...
Mark Joseph Cummins, Paul M. Newman
ADC
2003
Springer
106views Database» more  ADC 2003»
16 years 6 days ago
Database Component Ware
Database modeling is still a job of an artisan. Due to this approach database schemata evolve by growth without any evolution plan. Finally, they cannot be examined, surveyed, con...
Bernhard Thalheim