17840 search results - page 3187 / 3568 » Heterogeneous Parallel Computing |
200
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
169
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
Due to the simulation time of the reference input set, architects often use alternative simulation techniques. Although these alternatives reduce the simulation time, what has not...
161
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HPCA
2005
IEEE
16 years 7 months ago
2005
IEEE
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...
159
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
152
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HPCA
2004
IEEE
16 years 7 months ago
2004
IEEE
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...