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ISCA
1999
IEEE
87views Hardware» more  ISCA 1999»
15 years 11 months ago
Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs
Several ILP limit studies indicate the presence of considerable ILP across dynamically far-apart instructions in program execution. This paper proposes a hardware mechanism, dynam...
Sriram Vajapeyam, P. J. Joseph, Tulika Mitra
172
Voted
PPDP
2009
Springer
16 years 1 months ago
Reasoning with hypothetical judgments and open terms in hybrid
Hybrid is a system developed to specify and reason about logics, programming languages, and other formal systems expressed in rder abstract syntax (HOAS). An important goal of Hyb...
Amy P. Felty, Alberto Momigliano
KBSE
2007
IEEE
16 years 27 days ago
Sequential circuits for program analysis
A number of researchers have proposed the use of Boolean satisfiability solvers for verifying C programs. They encode correctness checks as Boolean formulas using finitization: ...
Fadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid
OSDI
2008
ACM
16 years 7 months ago
Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs
Deadlock is an increasingly pressing concern as the multicore revolution forces parallel programming upon the average programmer. Existing approaches to deadlock impose onerous bu...
Manjunath Kudlur, Scott A. Mahlke, Stéphane...
ESOP
2009
Springer
16 years 1 months ago
A Basis for Verifying Multi-threaded Programs
Abstract. Advanced multi-threaded programs apply concurrency concepts in sophisticated ways. For instance, they use fine-grained locking to increase parallelism and change locking...
K. Rustan M. Leino, Peter Müller