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ICCAD
2007
IEEE
164views Hardware» more  ICCAD 2007»
16 years 3 months ago
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...
Yu Hu, Satyaki Das, Steven Trimberger, Lei He
CSL
2007
Springer
16 years 24 days ago
On the Complexity of Reasoning About Dynamic Policies
We study the complexity of satisfiability for DLP+ dyn , an expressive logic introduced by Demri that allows to reason about dynamic policies. DLP+ dyn extends the logic DLPdyn of...
Stefan Göller
KBSE
2005
IEEE
16 years 6 days ago
Properties and scopes in web model checking
We consider a formal framework for property verification of web applications using Spin model checker. Some of the web related properties concern all states of the model, while ot...
May Haydar, Sergiy Boroday, Alexandre Petrenko, Ho...
LPNMR
2005
Springer
16 years 4 days ago
On Modular Translations and Strong Equivalence
Given two classes of logic programs, we may be interested in modular translations from one class into the other that are sound wth respect to the answer set semantics. The main the...
Paolo Ferraris
ICALP
2009
Springer
15 years 11 months ago
Decidability of the Guarded Fragment with the Transitive Closure
We consider an extension of the guarded fragment in which one can guard quantiers using the transitive closure of some binary relations. The obtained logic captures the guarded fr...
Jakub Michaliszyn