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DSN
2007
IEEE
16 years 27 days ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
GLOBECOM
2007
IEEE
16 years 27 days ago
Reliable Symbol Synchronization in Software-Driven Acoustic Sensor Networks
Abstract—Symbol synchronization in traditional hardwaredriven communication systems has relied on the transmission of training sequences of symbols just before the beginning of t...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...
GLVLSI
2007
IEEE
171views VLSI» more  GLVLSI 2007»
16 years 27 days ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo...
HASE
2007
IEEE
16 years 27 days ago
Scalable, Adaptive, Time-Bounded Node Failure Detection
This paper presents a scalable, adaptive and timebounded general approach to assure reliable, real-time Node-Failure Detection (NFD) for large-scale, high load networks comprised ...
Matthew Gillen, Kurt Rohloff, Prakash Manghwani, R...
HPCA
2007
IEEE
16 years 27 days ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
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