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CAL
2006
15 years 6 months ago
A case for fault tolerance and performance enhancement using chip multi-processors
This paper makes a case for using multi-core processors to simultaneously achieve transient-fault tolerance and performance enhancement. Our approach is extended from a recent late...
Huiyang Zhou
CAL
2006
15 years 6 months ago
A Case for Compressing Traces with BDDs
Instruction-level traces are widely used for program and hardware analysis. However, program traces for just a few seconds of execution are enormous, up to several terabytes in siz...
Graham D. Price, Manish Vachharajani
CGF
2006
198views more  CGF 2006»
15 years 6 months ago
Real-Time Weighted Pose-Space Deformation on the GPU
WPSD (Weighted Pose Space Deformation) is an example based skinning method for articulated body animation. The per-vertex computation required in WPSD can be parallelized in a SIM...
Taehyun Rhee, John P. Lewis, Ulrich Neumann
195
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CGF
2006
115views more  CGF 2006»
15 years 6 months ago
Reflected-Scene Impostors for Realistic Reflections at Interactive Rates
We present a technique for rendering reflections on complex reflectors at interactive rates based on approximating the geometry of the reflected scene with impostors. The reflecti...
Voicu Popescu, Chunhui Mei, Jordan Dauble, Elisha ...
CLEIEJ
2006
96views more  CLEIEJ 2006»
15 years 6 months ago
A Single-Version Algorithmic Approach to Fault Tolerant Computing Using Static Redundancy
This paper describes a single-version algorithmic approach to design in fault tolerant computing in various computing systems by using static redundancy in order to mask transient...
Goutam Kumar Saha
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