21437 search results - page 249 / 4288 » Hardware |
361
click to vote
CODES
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper proposes a novel Deadlock Avoidance Algorithm (DAA) and its hardware implementation, the Deadlock Avoidance Unit (DAU), as an Intellectual Property (IP) core that provi...
167
click to vote
CHES
2006
Springer
15 years 10 months ago
2006
Springer
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
167
click to vote
EVOW
2006
Springer
15 years 10 months ago
2006
Springer
Abstract. The efficient design of multiplierless implementations of constant matrix multipliers is challenged by the huge solution search spaces even for small scale problems. Prev...
164
click to vote
FDTC
2006
Springer
15 years 10 months ago
2006
Springer
Abstract. Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reli...
161
click to vote
ASPLOS
2008
ACM
15 years 8 months ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...