Sciweavers

974 search results - page 25 / 195
» Hardware Synthesis from Term Rewriting Systems
Sort
View
ACSD
2001
IEEE
121views Hardware» more  ACSD 2001»
15 years 9 months ago
A structural encoding technique for the synthesis of asynchronous circuits
This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such ...
Josep Carmona, Jordi Cortadella, Enric Pastor
CODES
2007
IEEE
16 years 10 days ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
FPL
2009
Springer
115views Hardware» more  FPL 2009»
15 years 10 months ago
Recursion in reconfigurable computing: A survey of implementation approaches
Reconfigurable systems are widely used nowadays to increase performance of computationally intensive applications. There exist a lot of synthesis tools that automatically generate...
Iouliia Skliarova, Valery Sklyarov
DAC
2012
ACM
13 years 8 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie
DAC
2005
ACM
16 years 7 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer