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» Hardware Synthesis from C C Models
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ISLPED
2004
ACM
88views Hardware» more  ISLPED 2004»
16 years 2 days ago
Architecting voltage islands in core-based system-on-a-chip designs
Voltage islands enable core-level power optimization for Systemon-Chip (SoC) designs by utilizing a unique supply voltage for each core. Architecting voltage islands involves isla...
Jingcao Hu, Youngsoo Shin, Nagu R. Dhanwada, Radu ...
181
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IPPS
2003
IEEE
15 years 12 months ago
Performance Monitoring and Evaluation of a UPC Implementation on a NUMA Architecture
UPC is an explicit parallel extension of ANSI C, which has been gaining rising attention from vendors and users. In this work, we consider the low-level monitoring and experimenta...
François Cantonnet, Yiyi Yao, Smita Annared...
FPGA
2010
ACM
294views FPGA» more  FPGA 2010»
15 years 11 months ago
Axel: a heterogeneous cluster with FPGAs and GPUs
This paper describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field P...
Kuen Hung Tsoi, Wayne Luk
FCCM
1998
IEEE
119views VLSI» more  FCCM 1998»
15 years 11 months ago
Specifying and Compiling Applications for RaPiD
E cient, deeply pipelined implementations exist for a wide variety of important computation-intensive applications, and many special-purpose hardware machines have been built that...
Darren C. Cronquist, Paul Franklin, Stefan G. Berg...
SI3D
1997
ACM
15 years 10 months ago
Managing Latency in Complex Augmented Reality Systems
Registration (or alignment) of the synthetic imagery with the real world is crucial in augmented reality (AR) systems. The data from user-input devices, tracking devices, and imag...
Marco C. Jacobs, Mark A. Livingston, Andrei State