3902 search results - page 529 / 781 » Hardware Synthesis from C C Models |
156
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DAC
2004
ACM
16 years 7 months ago
2004
ACM
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
194
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EDBT
2006
ACM
16 years 6 months ago
2006
ACM
Recent advances in hardware technology have resulted in the ability to collect and process large amounts of data. In many cases, the collection of the data is a continuous process ...
131
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SC
2009
ACM
16 years 1 months ago
2009
ACM
Manycore processors with wide SIMD cores are becoming a popular choice for the next generation of throughput oriented architectures. We introduce a hardware technique called “di...
198
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DFT
2009
IEEE
16 years 1 months ago
2009
IEEE
We propose a framework that allows dual-layer cooperative error control in a nanoscale network-on-chip (NoC), to simultaneously improve reliability, performance and energy efficie...
170
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IEEEPACT
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—In order to harness the full compute power of manycore processors, future designs must focus on effective utilization of on-chip cache and bandwidth resources. In this p...