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MICRO
1993
IEEE
131views Hardware» more  MICRO 1993»
15 years 11 months ago
Superblock formation using static program analysis
Compile-time code transformations which expose instruction-level parallelism (ILP) typically take into account the constraints imposed by all execution scenarios in the program. H...
Richard E. Hank, Scott A. Mahlke, Roger A. Bringma...
ASPDAC
2009
ACM
190views Hardware» more  ASPDAC 2009»
15 years 11 months ago
A reverse-encoding-based on-chip AHB bus tracer for efficient circular buffer utilization
The post-T/pre-T trace refers to the trace captured before/after a target point is reached, respectively. Real time compression of the post-T trace in a circular buffer is a challe...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
ACSC
2004
IEEE
15 years 10 months ago
Exploiting FPGA Concurrency to Enhance JVM Performance
The Java Programming Language has been praised for its platform independence and portability, but because of its slow execution speed on a software Java Virtual Machine (JVM), som...
James Parnis, Gareth Lee
DATE
2004
IEEE
120views Hardware» more  DATE 2004»
15 years 10 months ago
Pattern Selection for Testing of Deep Sub-Micron Timing Defects
Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating...
Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng
FPL
2009
Springer
162views Hardware» more  FPL 2009»
15 years 10 months ago
Efficient particle-pair filtering for acceleration of molecular dynamics simulation
The acceleration of molecular dynamics (MD) simulations using high performance reconfigurable computing (HPRC) has been much studied. Given the intense competition from multicore...
Matt Chiu, Martin C. Herbordt