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ISCA
2011
IEEE
294views Hardware» more  ISCA 2011»
14 years 10 months ago
Moguls: a model to explore the memory hierarchy for bandwidth improvements
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, ...
PLDI
2004
ACM
16 years 4 days ago
Symbolic pointer analysis revisited
Pointer analysis is a critical problem in optimizing compiler, parallelizing compiler, software engineering and most recently, hardware synthesis. While recent efforts have sugges...
Jianwen Zhu, Silvian Calman
CODES
2003
IEEE
16 years 3 hour ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...
MTA
2011
220views Hardware» more  MTA 2011»
15 years 1 months ago
Modeling, simulation, and practice of floor control for synchronous and ubiquitous collaboration
: With the advances in a variety of software/hardware technologies and wireless networking, there is coming a need for ubiquitous collaboration which allows people to access inform...
Kangseok Kim, Geoffrey C. Fox
HT
1999
ACM
15 years 11 months ago
Do you have the Time? Composition and Linking in Time-Based Hypermedia
Most hypermedia models and systems do not incorporate time explicitly. This prevents authors from having direct control over the temporal aspects of a presentation. In this paper ...
Lynda Hardman, Jacco van Ossenbruggen, K. Sjoerd M...