3902 search results - page 268 / 781 » Hardware Synthesis from C C Models |
155
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NIPS
1996
15 years 8 months ago
1996
We present a connectionist method for representing images that explicitlyaddresses their hierarchicalnature. It blends data fromneuroscience about whole-object viewpoint sensitive...
153
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ICCD
2007
IEEE
16 years 3 months ago
2007
IEEE
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
159
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ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
121
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ICCAD
2005
IEEE
16 years 3 months ago
2005
IEEE
Networks-on-Chip (NoCs) represent a promising solution to complex on-chip communication problems. The NoC communication architectures considered so far are based on either complete...
135
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
—In this paper, we propose a novel on-chip communication scheme by dividing the resources of a traditional packet-switched network-on-chip between a packet-switched and a circuit...