3902 search results - page 262 / 781 » Hardware Synthesis from C C Models |
168
click to vote
ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
163
Voted
ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents a constant quality video rate control (CQVRC) scheme for MPEG-4 FGS (fine-grain scalability) video. The proposed scheme can mitigate quality variations among ...
177
Voted
ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
196
Voted
ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
149
click to vote
ASPDAC
2010
ACM
15 years 4 months ago
2010
ACM
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...