3902 search results - page 239 / 781 » Hardware Synthesis from C C Models |
173
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DSD
2002
IEEE
15 years 11 months ago
2002
IEEE
A configurable memory organisation for the execution of Hiperlan/2 transceiver baseband processing and MPEG2 decoding is presented. The configuration of the memory system is done ...
179
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ISQED
2000
IEEE
15 years 11 months ago
2000
IEEE
We address the problem of power estimation at the register-transfer level (RTL). At this level, the circuit is described in terms of a set of interconnected memory elements and co...
168
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SIGMETRICS
1998
ACM
15 years 10 months ago
1998
ACM
This paper reports on a set of experiments that measure the amount of CPU processing needed to decode MPEGcompressed video in software. These experiments were designed to discover...
213
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SIGMETRICS
2011
ACM
14 years 9 months ago
2011
ACM
Many network links in developing regions operate in the subpacket regime, an environment where the typical per-flow throughput is less than 1 packet per round-trip time. TCP and ...
176
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— Exploding health care demands and costs of aging and stressed populations necessitate the use of more in-home monitoring and personalized health care. Electronics hold great pr...