Sciweavers

3902 search results - page 234 / 781
» Hardware Synthesis from C C Models
Sort
View
DATE
2006
IEEE
124views Hardware» more  DATE 2006»
16 years 19 days ago
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
ICIAP
1997
ACM
15 years 10 months ago
Color Based Object Recognition
The purpose is to arrive at recognition of multicolored objects invariant to a substantial change in viewpoint, object geometry and illumination. Assuming dichromatic reflectance...
Theo Gevers, Arnold W. M. Smeulders
PLDI
2010
ACM
15 years 9 months ago
DRFX: a simple and efficient memory model for concurrent programming languages
The most intuitive memory model for shared-memory multithreaded programming is sequential consistency (SC), but it disallows the use of many compiler and hardware optimizations th...
Daniel Marino, Abhayendra Singh, Todd D. Millstein...
IWPC
1996
IEEE
15 years 10 months ago
The Gadfly: An Approach to Architectural-Level System Comprehension
Technology to support system comprehension tends to reflect either a "bottom-up" or "top-down" approach. Bottom-up approaches attempt to derive system models f...
Kurt C. Wallnau, Paul C. Clements, Edwin J. Morris...
ISCA
2010
IEEE
240views Hardware» more  ISCA 2010»
15 years 11 months ago
Modeling critical sections in Amdahl's law and its implications for multicore design
This paper presents a fundamental law for parallel performance: it shows that parallel performance is not only limited by sequential code (as suggested by Amdahl’s law) but is a...
Stijn Eyerman, Lieven Eeckhout