Sciweavers

3902 search results - page 229 / 781
» Hardware Synthesis from C C Models
Sort
View
ISLPED
2003
ACM
100views Hardware» more  ISLPED 2003»
15 years 11 months ago
Checkpointing alternatives for high performance, power-aware processors
High performance processors use checkpointing to rapidly recover from branch mispredictions and possibly other exceptions. We demonstrate that conventional checkpointing becomes u...
Andreas Moshovos
CODES
2009
IEEE
16 years 1 months ago
Exploiting data-redundancy in reliability-aware networked embedded system design
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...
Martin Lukasiewycz, Michael Glaß, Jürge...
PLDI
2011
ACM
14 years 9 months ago
Understanding POWER multiprocessors
Exploiting today’s multiprocessors requires highperformance and correct concurrent systems code (optimising compilers, language runtimes, OS kernels, etc.), which in turn requir...
Susmit Sarkar, Peter Sewell, Jade Alglave, Luc Mar...
SIGSOFT
2010
ACM
15 years 1 months ago
RT-simex: retro-analysis of execution traces
This presentation demonstrates the early results from the French ANR project RT-Simex. RT-Simex proposes a set of tools to analyze timing of parallel embedded code and trace the s...
Julien DeAntoni, Frédéric Mallet, Fr...
ISOLA
2004
Springer
15 years 12 months ago
EZPetri: A Petri net interchange framework for Eclipse based on PNML
Petri net community has suffered with the lack of a standard format to represent Petri net models. This situation led to an undesirable tool incompatibility. In order to solve thi...
Gabriel Alves, Adilson Arcoverde, Ricardo Massa Fe...