3902 search results - page 222 / 781 » Hardware Synthesis from C C Models |
156
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ICCD
2007
IEEE
15 years 10 months ago
2007
IEEE
Transaction-level modeling (TLM) allows a designer to save functional verification effort during the modular refinement of an SoC by reusing the prior implementation of a module a...
232
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ASPLOS
2011
ACM
14 years 10 months ago
2011
ACM
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
165
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BMCBI
2005
15 years 6 months ago
2005
Background: Estimators of free energies are routinely used to judge the quality of protein structural models. As these estimators still present inaccuracies, they are frequently e...
218
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CAV
2009
Springer
16 years 7 months ago
2009
Springer
Context-bounded analysis is an attractive approach to verification of concurrent programs. Bounding the number of contexts executed per thread not only reduces the asymptotic compl...
170
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Extensive software-based simulation continues to be the mainstream methodology for functional verification of designs. To optimize the use of limited simulation resources, coverag...