3902 search results - page 184 / 781 » Hardware Synthesis from C C Models |
149
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FPL
2007
Springer
16 years 20 days ago
2007
Springer
A temporal correlation based port combination algorithm that customizes the router design in Network-on-Chip (NoC) is proposed for reconfigurable systems in order to minimize req...
143
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ICCAD
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper presents the underlying methodology of Cosmos, an interactive approach for hardware software co-design capable of handling multiprocessor systems and distributed archit...
122
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
A system-on-chip lock cache (SoCLC) is an intellectual property (IP) core that provides effective lock synchronization in a heterogeneous multiprocessor shared-memory system-on-ac...
162
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ICCAD
2002
IEEE
15 years 11 months ago
2002
IEEE
Partitioning an embedded system application among a microprocessor and custom hardware has been shown to improve the performance, power or energy of numerous examples. The advent ...
148
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ICCAD
1996
IEEE
15 years 10 months ago
1996
IEEE
A new method is presented to compute the exact observability don't cares (ODC) for multilevel combinational circuits. A new mathematical concept, called polarization, is intr...