3902 search results - page 156 / 781 » Hardware Synthesis from C C Models |
156
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DATE
2007
IEEE
16 years 23 days ago
2007
IEEE
Abstract. Congestion has negative effects on network performance. In this paper, a novel congestion control strategy is presented for Networks-on-Chip (NoC). For this purpose we in...
202
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ACMMSP
2006
ACM
16 years 12 days ago
2006
ACM
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
190
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IWCMC
2006
ACM
16 years 12 days ago
2006
ACM
Multipath fading heavily contributes to the unreliability of wireless links, causing fairly large deviations from link quality predictions based on path loss models; its impact on...
126
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper proposes an original model of the execution time of assembly instructions in superscalar architectures. The approach is based on a rigorous mathematical model and provi...
151
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WSC
2004
15 years 7 months ago
2004
This paper presents VITASCOPE, a general-purpose, userextensible 3D visualization system for animating processes that are modeled using Discrete-Event Simulation tools. VITASCOPE ...