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DATE
2010
IEEE
171views Hardware» more  DATE 2010»
15 years 11 months ago
Statistical static timing analysis using Markov chain Monte Carlo
—We present a new technique for statistical static timing analysis (SSTA) based on Markov chain Monte Carlo (MCMC), that allows fast and accurate estimation of the right-hand tai...
Yashodhan Kanoria, Subhasish Mitra, Andrea Montana...
CASES
2007
ACM
15 years 10 months ago
Rethinking custom ISE identification: a new processor-agnostic method
The last decade has witnessed the emergence of the Application Specific Instruction-set Processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user...
Ajay K. Verma, Philip Brisk, Paolo Ienne
HICSS
1996
IEEE
136views Biometrics» more  HICSS 1996»
15 years 10 months ago
Design of a Real-Time Co-Operating System for Multiprocessor Workstations
: We have designed a Real-Time Co-Operating System (RTCOS) for simultaneously supporting real-time and non-real-time activities on a workstation with two or more processors. The RT...
Gebran Krikor, Md. Touhidur Raza, David B. Stewart
DAC
2004
ACM
16 years 7 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
MICRO
2006
IEEE
88views Hardware» more  MICRO 2006»
15 years 6 months ago
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Low-overhead checkpointing and rollback is a popular technique for fault recovery. While different approaches are possible, hardware-supported checkpointing and rollback at the ca...
Radu Teodorescu, Jun Nakano, Josep Torrellas