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DATE
2010
IEEE
138views Hardware» more  DATE 2010»
15 years 11 months ago
Checking and deriving module paths in Verilog cell library descriptions
—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
Matthias Raffelsieper, Mohammad Reza Mousavi, Chri...
ICCAD
1999
IEEE
78views Hardware» more  ICCAD 1999»
15 years 11 months ago
Probabilistic state space search
This paper describes a probabilistic approach to state space search. The presented method applies a ranking of the design states according to their probability of reaching a given...
Andreas Kuehlmann, Kenneth L. McMillan, Robert K. ...
ISPD
1998
ACM
99views Hardware» more  ISPD 1998»
15 years 10 months ago
New efficient algorithms for computing effective capacitance
We describe a novel iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. Our new approach is considerably faster than p...
Andrew B. Kahng, Sudhakar Muddu
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
16 years 8 days ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov
ECBS
2007
IEEE
155views Hardware» more  ECBS 2007»
15 years 10 months ago
Evaluating the Quality of Models Extracted from Embedded Real-Time Software
Due to the high cost of modeling, model-based techniques are yet to make their impact in the embedded systems industry, which still persist on maintaining code-oriented legacy sys...
Joel Huselius, Johan Kraft, Hans Hansson, Sasikuma...