—Module paths are often used to specify the delays of cells in a Verilog cell library description, which define the propagation delay for an event from an input to an output. Sp...
Matthias Raffelsieper, Mohammad Reza Mousavi, Chri...
This paper describes a probabilistic approach to state space search. The presented method applies a ranking of the design states according to their probability of reaching a given...
Andreas Kuehlmann, Kenneth L. McMillan, Robert K. ...
We describe a novel iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. Our new approach is considerably faster than p...
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Due to the high cost of modeling, model-based techniques are yet to make their impact in the embedded systems industry, which still persist on maintaining code-oriented legacy sys...
Joel Huselius, Johan Kraft, Hans Hansson, Sasikuma...