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FPL
2007
Springer
120views Hardware» more  FPL 2007»
16 years 28 days ago
Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
In this paper, we propose a Dynamically Reconfigurable Processor Array (DRPA) generator which can generate various types of DRPAs. Our target DRPA architecture is fully parameter...
Yohei Hasegawa, Hideharu Amano
DSD
2005
IEEE
106views Hardware» more  DSD 2005»
16 years 11 days ago
SystemC-based Design Methodology for Reconfigurable System-on-Chip
Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technologydependent tools have b...
Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen
SBACPAD
2003
IEEE
137views Hardware» more  SBACPAD 2003»
16 years 1 days ago
Exploring Memory Hierarchy with ArchC
This paper presents the cache configuration exploration of a programmable system, in order to find the best matching between the architecture and a given application. Here, prog...
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Aze...
ICES
2001
Springer
91views Hardware» more  ICES 2001»
15 years 11 months ago
Untidy Evolution: Evolving Messy Gates for Fault Tolerance
Abstract. The exploitation of the physical characteristics has already been demonstrated in the intrinsic evolution of electronic circuits. This paper is an initial attempt at crea...
Julian F. Miller, Morten Hartmann
FCCM
2000
IEEE
133views VLSI» more  FCCM 2000»
15 years 11 months ago
Configuration Caching Management Techniques for Reconfigurable Computing
Although run-time reconfigurable systems have been shown to achieve very high performance, the speedups over traditional microprocessor systems are limited by the cost of configur...
Zhiyuan Li, Katherine Compton, Scott Hauck