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EMSOFT
2007
Springer
16 years 28 days ago
Virtual execution of AADL models via a translation into synchronous programs
Architecture description languages are used to describe both the hardware and software architecture of an application, at system-level. The basic software components are intended ...
Erwan Jahier, Nicolas Halbwachs, Pascal Raymond, X...
ISQED
2009
IEEE
111views Hardware» more  ISQED 2009»
16 years 1 months ago
Efficient statistical analysis of read timing failures in SRAM circuits
A system-level statistical analysis methodology is described that captures the impact of inter- and intra-die process variations for read timing failures in SRAM circuit blocks. U...
Soner Yaldiz, Umut Arslan, Xin Li, Larry T. Pilegg...
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
16 years 1 months ago
A Virtual Prototype for Bluetooth over Ultra Wide Band System Level Design
The industry is merging two different Wireless Personal Area Networks (WPAN) technologies: Bluetooth (BT) and WiMedia Ultra Wide Band (UWB), into a single BT over UWB (BToUWB) spe...
Alexandre Lewicki, Javier del Prado Pavon, Jacky T...
DATE
2008
IEEE
155views Hardware» more  DATE 2008»
16 years 1 months ago
Comparison of memory write policies for NoC based Multicore Cache Coherent Systems
The following study shows a direct comparison of memory write policies in Shared Memory Multicore Systems. Although there are much work and many studies about this issue, our work...
Pierre Guironnet de Massas, Frédéric...
DATE
2007
IEEE
74views Hardware» more  DATE 2007»
16 years 1 months ago
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks
High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the var...
Alireza Ejlali, Bashir M. Al-Hashimi, Paul M. Rosi...