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ICCD
2007
IEEE
99views Hardware» more  ICCD 2007»
15 years 10 months ago
Power reduction of chip multi-processors using shared resource control cooperating with DVFS
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
Ryo Watanabe, Masaaki Kondo, Hiroshi Nakamura, Tak...
WSC
1998
15 years 8 months ago
Bayesian Model Selection when the Number of Components is Unknown
In simulation modeling and analysis, there are two situations where there is uncertainty about the number of parameters needed to specify a model. The first is in input modeling w...
Russell C. H. Cheng
VLSID
2010
IEEE
181views VLSI» more  VLSID 2010»
15 years 10 months ago
Parametric Fault Diagnosis of Nonlinear Analog Circuits Using Polynomial Coefficients
We propose a method for diagnosis of parametric faults in analog circuits using polynomial coefficients of the circuit model [15]. As a sequel to our recent work [14], where circ...
Suraj Sindia, Virendra Singh, Vishwani D. Agrawal
ENGL
2008
93views more  ENGL 2008»
15 years 6 months ago
Generation of Equations of Motion in Reference Frame Formulation for FEM Models
: This paper presents a method of the reformulation of equations in the inertial frame formulation, used for FEM models of flexible multibody systems, to the floating frame formula...
Dmitry Vlasenko, Roland Kasper
VTS
2000
IEEE
113views Hardware» more  VTS 2000»
15 years 11 months ago
Hidden Markov and Independence Models with Patterns for Sequential BIST
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...
Laurent Bréhélin, Olivier Gascuel, G...