Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
We present a new method of selecting the best of several competing system designs on the basis of expected steadystate performance. The method uses a new form of timeseries bootst...
Model checking has proven to be an effective technology for verification and debugging in hardware and more recently in software domains. We believe that recent trends in both th...
Matthew B. Dwyer, John Hatcliff, Matthew Hoosier, ...
While researchers have invested substantial effort to build architectural power models, validating such models has proven difficult at best. In this paper, we examine the accurac...
Madhu Saravana Sibi Govindan, Stephen W. Keckler, ...
This paper describes the synthesis and hardware implementation of a signal-type asynchronous data communication mechanism (ACM). Such an ACM can be used in systems where a data-dr...