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ITC
2003
IEEE
127views Hardware» more  ITC 2003»
15 years 11 months ago
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects
In this paper, we study the possibility of using logic defect-level prediction models to predict the detection behavior of statistical timing defects. We compare two known logic m...
Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting...
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
16 years 3 months ago
MC-Sim: an efficient simulation tool for MPSoC designs
The ability to integrate diverse components such as processor cores, memories, custom hardware blocks and complex network-on-chip (NoC) communication frameworks onto a single chip...
Jason Cong, Karthik Gururaj, Guoling Han, Adam Kap...
MASCOTS
2008
15 years 8 months ago
Modeling Software Contention using Colored Petri Nets
Commercial servers, such as database or application servers, often attempt to improve performance via multithreading. Improper multi-threading architectures can incur contention, ...
Nilabja Roy, Akshay Dabholkar, Nathan Hamm, Lawren...
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
15 years 11 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
ICCS
2009
Springer
16 years 1 months ago
Improving the Scalability of SimGrid Using Dynamic Routing
Research into large-scale distributed systems often relies on the use of simulation frameworks in order to bypass the disadvantages of performing experiments on real testbeds. SimG...
Silas De Munck, Kurt Vanmechelen, Jan Broeckhove