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DATE
2008
IEEE
66views Hardware» more  DATE 2008»
16 years 1 months ago
Wrapper and TAM Co-Optimization for Reuse of SoC Functional Interconnects
This paper presents a wrapper and TAM co-optimization method for reuse of SoC functional interconnects to minimize test time under area constraint. The proposed method consists of...
Tomokazu Yoneda, Hideo Fujiwara
WSC
2001
15 years 7 months ago
Study of an ergodicity pitfall in multitrajectory simulation
Multitrajectory Simulation allows random events in a simulation to generate multiple trajectories. Management techniques have been developed to manage the choices of trajectories ...
John B. Gilmer Jr., Frederick J. Sullivan
JPDC
2006
253views more  JPDC 2006»
15 years 6 months ago
Collaborative detection and filtering of shrew DDoS attacks using spectral analysis
This paper presents a new spectral template-matching approach to countering shrew distributed denial-of-service (DDoS) attacks. These attacks are stealthy, periodic, pulsing, and ...
Yu Chen, Kai Hwang
ISCAS
2008
IEEE
123views Hardware» more  ISCAS 2008»
16 years 28 days ago
Design space exploration of low-phase-noise LC-VCO using multiple-divide technique
— This paper proposes a multiple-divide technique using by-2, by-3, and by-4 frequency dividers to realize a lower phase-noise LC-VCO, and explores the design space of low-phasen...
Shoichi Hara, Takeshi Ito, Kenichi Okada, Akira Ma...
ISQED
2010
IEEE
170views Hardware» more  ISQED 2010»
15 years 8 months ago
New SRAM design using body bias technique for ultra low power applications
A new SRAM design is proposed. Body biasing improves the static noise margin (SNM) improved by at least 15% compared to the standard cells. Through using this technique, lowering ...
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Yn...