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ISQED
2000
IEEE
91views Hardware» more  ISQED 2000»
15 years 10 months ago
Probabilistic Bottom-Up RTL Power Estimation
We address the problem of power estimation at the register-transfer level (RTL). At this level, the circuit is described in terms of a set of interconnected memory elements and co...
Ricardo Ferreira, A.-M. Trullemans, José C....
BIOCOMP
2009
15 years 4 months ago
Simulating Spatial Partial Differential Equations with Cellular Automata
Abstract-- Spatial partial differential equations are commonly used to describe systems of biological entities, such as patterns created by desert vegetation and biovermiculation g...
Brian Strader, Keith E. Schubert, Ernesto Gomez, J...
ISCAS
2003
IEEE
110views Hardware» more  ISCAS 2003»
15 years 11 months ago
Interconnect modeling and sensitivity analysis using adjoint networks reduction technique
An efficient model-order reduction technique for general RLC networks is proposed. The method is extended from the previous projection-base moment matching method with considerin...
Herng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng
ICCAD
2006
IEEE
100views Hardware» more  ICCAD 2006»
16 years 3 months ago
Faster, parametric trajectory-based macromodels via localized linear reductions
— Trajectory-based methods offer an attractive methodology for automated, on-demand generation of macromodels for custom circuits. These models are generated by sampling the stat...
Saurabh K. Tiwary, Rob A. Rutenbar
EUROMICRO
2000
IEEE
15 years 11 months ago
Formal Coverification of Embedded Systems Using Model Checking
The complexity of embedded systems is increasing rapidly. In consequence, new verification techniques that overcome the limitations of traditional methods and are suitable for har...
Luis Alejandro Cortés, Petru Eles, Zebo Pen...