3335 search results - page 281 / 667 » Grid result checking |
161
click to vote
DAC
2001
ACM
16 years 7 months ago
2001
ACM
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit...
152
click to vote
DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Equivalence checking and property checking are powerful techniques to detect error traces. Debugging these traces is a time consuming design task where automation provides help. I...
163
click to vote
RTSS
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—The Hierarchical Timing Language (HTL) is a realtime coordination language for distributed control systems. HTL programs must be checked for well-formedness, race freedo...
161
click to vote
FM
2009
Springer
16 years 1 months ago
2009
Springer
Abstract. We present a new domain for analyzing must-equalities between address expressions. The domain is a smooth combination of Herbrand and affine equalities which enables us t...
150
click to vote
HASKELL
2009
ACM
16 years 1 months ago
2009
ACM
We present by example a new application domain for functional languages: emulators for embedded real-time protocols. As a casestudy, we implement a simple emulator for the Biphase...