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154
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DATE
2006
IEEE
16 years 7 days ago
2006
IEEE
Increasing miniaturization is posing multiple challenges to electronic designers. In the context of Multi-Processor System-onChips (MPSoCs), we focus on the problem of implementin...
183
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ISPD
1998
ACM
15 years 10 months ago
1998
ACM
In this paper, we formulate the problem of topology constrained rectilinear block packing in layout reuse. A speci c class of rectilinear shaped blocks, ordered convex rectilinear...
162
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ICCAD
1997
IEEE
15 years 10 months ago
1997
IEEE
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...
147
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SODA
2010
ACM
16 years 3 months ago
2010
ACM
We consider the following well-known problem, which is called the edge-disjoint paths problem. Input: A graph G with n vertices and m edges, k pairs of vertices (s1, t1), (s2, t2)...
161
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ORL
2007
15 years 5 months ago
2007
We prove that it is NP-complete to decide whether a bipartite graph of maximum degree three on nk vertices can be partitioned into n paths of length k. Finally, we propose some ap...