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PPOPP
2006
ACM
16 years 16 days ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
SIGCOMM
2006
ACM
16 years 16 days ago
Planet scale software updates
Fast and effective distribution of software updates (a.k.a. patches) to millions of Internet users has evolved into a critical task over the last years. In this paper, we characte...
Christos Gkantsidis, Thomas Karagiannis, Milan Voj...
ICDCS
2005
IEEE
16 years 5 days ago
DISC: Dynamic Interleaved Segment Caching for Interactive Streaming
Streaming media objects have become widely used on the Internet, and the demand of interactive requests to these objects has increased dramatically. Typical interactive requests i...
Lei Guo, Songqing Chen, Zhen Xiao, Xiaodong Zhang
ICPPW
2005
IEEE
16 years 5 days ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
IEEEPACT
2005
IEEE
16 years 5 days ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
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