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» Global delay optimization using structural choices
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ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
15 years 11 months ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...
PAM
2004
Springer
15 years 11 months ago
Measurements and Laboratory Simulations of the Upper DNS Hierarchy
Given that the global DNS system, especially at the higher root and top-levels, experiences significant query loads, we seek to answer the following questions: (1) How does the ch...
Duane Wessels, Marina Fomenkov, Nevil Brownlee, Ki...
GECCO
2007
Springer
162views Optimization» more  GECCO 2007»
16 years 11 hour ago
Some novel locality results for the blob code spanning tree representation
The Blob Code is a bijective tree code that represents each tree on n labelled vertices as a string of n − 2 vertex labels. In recent years, several researchers have deployed th...
Tim Paulden, David K. Smith
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 11 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood
GECCO
2009
Springer
192views Optimization» more  GECCO 2009»
15 years 3 months ago
Improving SMT performance: an application of genetic algorithms to configure resizable caches
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
Josefa Díaz, José Ignacio Hidalgo, F...