A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
In this paper we present the design and implementation of a dynamically reconfigurable system for packet queue scheduling. Two widely accepted queue schedulers have been implement...
In this article, we describe the application of an enhanced genetic algorithm to the problem of hardware-software codesign. Starting from a source code written in a high-level lan...
Current eCommerce is still mainly characterized by the relatively straightforward trading of commodity goods. Nextgeneration efforts in worldwide information infrastructure, espec...
A novel, two stage, neural architecture for the segmentation of range data and their modeling with undeformed superquadrics is presented. The system is composed by two distinct neu...